Single stage FIFO memory with a circuit enabling memory to be re
Skip based control logic for first in first out buffer
Software and process for low-latency audio recording
Software and process for low-latency audio recording
Software programmable calendar queue cache
Split-FIFO multi-station data transfer system
Split-queue architecture with a first queue area and a...
Stacked semiconductor memory device with compound read buffer
State machine design for generating half-full and half-empty fla
Storage apparatus
Storage architecture employing a transfer node to achieve...
Storage buffer that dynamically adjusts boundary between two sto
Storage device buffer access control in accordance with a...
Storage device with buffer control unit
Storage system disposed with plural integrated circuits
Storage system, switch, storage medium having a program,...
Store and forward device utilizing cache to store status...
Stream under-run/over-run recovery
Stream under-run/over-run recovery
Streaming data transfer system and repeater therefor