Electrical computers and digital data processing systems: input/ – Input/output data processing – Input/output data buffering
Reexamination Certificate
2003-03-24
2009-06-09
Kindred, Alford W (Department: 2181)
Electrical computers and digital data processing systems: input/
Input/output data processing
Input/output data buffering
C710S112000, C710S317000
Reexamination Certificate
active
07546399
ABSTRACT:
In general, in one aspect, the disclosure describes an apparatus capable of queuing and de-queuing data stored in a plurality of queues. The apparatus includes a status storage device to track status for each of the plurality of queues, a status cache to track status for a subset of the plurality of queues that are undergoing processing, and a queuing engine to queue incoming data and de-queue outgoing data. The queuing engine receives and updates the status for the subset of the plurality of queues from the status cache and receives and updates the status for remaining queues from the status storage device.
REFERENCES:
patent: 5859835 (1999-01-01), Varma et al.
patent: 6304932 (2001-10-01), Ziegler et al.
patent: 6687781 (2004-02-01), Wynne et al.
patent: 2002/0065865 (2002-05-01), Gilbert
patent: 2003/0147375 (2003-08-01), Goergen et al.
Bannur Jaisimha
Restrick Robert C.
Varma Anujan
Dews Brooke J
Intel Corporation
Kindred Alford W
Ryder Douglas J.
Ryder IP Law
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