Stacked semiconductor memory device with compound read buffer

Electrical computers and digital data processing systems: input/ – Input/output data processing – Input/output data buffering

Reexamination Certificate

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Details

C710S005000, C710S036000, C711S100000

Reexamination Certificate

active

07913000

ABSTRACT:
A stacked memory apparatus operating with a compound read buffer is disclosed. The stacked memory apparatus includes an interface device having a main buffer and a plurality of memory devices each having a device read buffer. Systems incorporating one or more stacked memory apparatuses and related method of performing a read operation are also disclosed.

REFERENCES:
patent: 2009/0300314 (2009-12-01), LaBerge et al.

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