Floor plan evaluating method, floor plan correcting method,...

Floor plan tester for integrated circuit design

Floor-planning technique applied to circuit design in which...

Floorplan evaluation, global routing, and buffer insertion...

Floorplan visualization method using gate count and gate...

Floorplanning a hierarchical physical design to improve...

Floorplanning apparatus and computer readable recording...

Floorplanning apparatus deciding floor plan using logic...

Flow definition language for designing integrated circuit...

Flow definition language for designing integrated circuit...

Focus correcting method and method of manufacturing...

Focus monitoring method, exposure apparatus, and exposure mask

Focused ion beam defining process enhancement

Forced conformance design-rule halos for computer aided design s

Forgery prevention microcontroller circuit

Formal logic verification system and method

Formal proof methods for analyzing circuit loading problems...

Formal verification method

Formal verification of a logic design through implicit...

Formally deriving a minimal clock-gating scheme