Floorplanning apparatus deciding floor plan using logic...

Details Floorplanning apparatus deciding floor plan using logic... Floorplanning apparatus deciding floor plan using logic...

2005-08-30

2005-08-30

Whitmore, Stacy A. (Department: 2825)

Computer-aided design and analysis of circuits and semiconductor

Nanotechnology related integrated circuit design

C716S030000

Reexamination Certificate

active

06938232

ABSTRACT:
A floorplanning apparatus includes a seed position decision section for deciding a placement position of a logic seed of each hierarchical block; a cell placement section for placing cells belonging to the hierarchical block around the placement position of each logic seed; and a placement region decision section for deciding placement and routing regions of each hierarchical block considering cell placement results produced by the cell placement section.

REFERENCES:
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patent: 6292929 (2001-09-01), Scepanovic et al.
patent: 6519749 (2003-02-01), Chao et al.
patent: 6567967 (2003-05-01), Greidinger et al.
patent: 6578183 (2003-06-01), Cheong et al.
patent: 63-308676 (1988-12-01), None
patent: 2002-7497 (2002-01-01), None

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