Parasitic effects analysis of circuit structures

Parasitic element extraction apparatus

Partial configuration of a programmable gate array using a...

Partial good schema for integrated circuits having parallel...

Partial reconfiguration of a programmable gate array using a...

Partial reconfiguration of a programmable logic device using...

Partition-based decision heuristics for SAT and image...

Partition-based incremental implementation flow for use with...

Partitioning a large design across multiple devices

Partitioning a large design across multiple devices

Partitioning a large design across multiple devices

Partitioning integrated circuit hierarchy

Partitioning placement method and apparatus

Partitioning placement method using diagonal cutlines

Partitioning using hardware

Pass transistor logic circuit and a method of designing thereof

Pass-transistor logic circuit and a method of designing thereof

Pass-transistor logic circuit and a method of designing thereof

Pass-transistor logic circuit and a method of designing thereof

Pass-transistor logic circuit and a method of designing thereof