Partitioning integrated circuit hierarchy

Details Partitioning integrated circuit hierarchy Partitioning integrated circuit hierarchy

2005-05-17

2005-05-17

Thompson, A. M. (Department: 2825)

Computer-aided design and analysis of circuits and semiconductor

Nanotechnology related integrated circuit design

C716S030000

Reexamination Certificate

active

06895562

ABSTRACT:
A method and apparatus of carrying out a computer assisted analysis function on a hierarchical circuit model. The method is carried out by inputting the hierarchical circuit model, specifying at least one circuit block within the hierarchy as a target of the function on the target block, and simplifying the hierarchical circuit model by deleting circuit blocks not affecting the analysis function, to produce a simplified hierarchical circuit model. A computer assisted analysis function can then be carried out on the simplified hierarchical circuit model. The model is simplified by carrying out a block by block analysis of the hierarchical circuit model to determine if a circuit block is a circuit block desired in the computer assisted analysis and if so keeping the circuit block as part of the simplified hierarchical circuit model; and by carrying out a block by block analysis of the hierarchical circuit model to determine if a circuit block comprises a parent circuit block containing a child circuit block desired in the computer assisted analysis and if so keeping the parent circuit block as part of the simplified hierarchical circuit model.

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