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Sub-resolution alignment of images

Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
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Sub-resolution alignment of images

Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
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Sub-system power noise suppression design procedure

Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
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Subgrid detailed routing

Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
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Substituting high performance and low power macros in...

Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
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Substitution of non-minimum groundrule cells for...

Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
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Substrate via patterns for optimal power distribution and...

Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
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Suite of tools to design integrated circuits

Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
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Suite of tools to design integrated circuits

Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
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Sum of coherent systems (SOCS) approximation based on object...

Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
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Supplant design rules in electronic designs

Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
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Support method for designing a semiconductor device

Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
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Supporting multiple FPGA configuration modes using dedicated...

Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
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Switch methodology for mask-programmable logic devices

Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
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Symbolic model checking with dynamic model pruning

Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
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Symbolic variable reduction

Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
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Symmetric signal distribution through abutment connection

Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
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Symmetric signal distribution through abutment connection

Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
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Synchronous elastic designs with early evaluation

Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
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Synchronous to asynchronous logic conversion

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