Clock boosting systems and methods
Clock power minimization with regular physical placement of...
Clock-gating circuit insertion method, clock-gating circuit...
Computer readable medium, system and associated method for...
Computer readable recording medium with a wiring design...
Computer-readable storage media comprising data streams...
Configuration information writing apparatus, configuration...
Configuration specification language supporting arbitrary...
Congestion aware pin optimizer
Congestion estimation for programmable logic devices
Data aligner in reconfigurable computing environment
Data aligner in reconfigurable computing environment
Detailed placer for optimizing high density cell placement...
Device having programmable resources and a method of...
Dynamic push for topological routing of semiconductor packages
Efficient power region checking of multi-supply voltage...
Electric circuit and method for adjusting wirelength of...
Electro-migration verifying apparatus, electro-migration...
Enhanced verification through binary decision diagram-based...
Exact geometry operations on shapes using fixed-size integer...