Computer-aided design and analysis of circuits and semiconductor – Integrated circuit design processing – Physical design processing
Reexamination Certificate
2008-02-15
2011-12-27
Siek, Vuthe (Department: 2825)
Computer-aided design and analysis of circuits and semiconductor
Integrated circuit design processing
Physical design processing
C716S106000, C716S120000, C716S127000
Reexamination Certificate
active
08086980
ABSTRACT:
A improved method for very-early validation of voltage region physical power distribution networks uses initial floor plan and early power grid data to identify physical power connection problems associated with voltage regions defined in multi-supply voltage microprocessor chip designs. Since all checking algorithms are floor plan-based and do not require complete circuit data, they are executable very early in the design phase. As a result, power region-related problems can be resolved much sooner than by using conventional full-chip physical design checking and power grid analysis methods.
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International Business Machines - Corporation
Kinnaman, Jr. William A.
Siek Vuthe
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