Dynamic push for topological routing of semiconductor packages

Details Dynamic push for topological routing of semiconductor packages Dynamic push for topological routing of semiconductor packages

2011-08-23

2011-08-23

Lin, Sun J (Department: 2825)

Computer-aided design and analysis of circuits and semiconductor

Integrated circuit design processing

Physical design processing

C716S129000, C716S130000

Reexamination Certificate

active

08006216

ABSTRACT:
Techniques are disclosed for performing topologically planar routing of System in Packages (SiPs). A routing graph can be represented by a particle-insertion-based constraint Delaunay triangulation (PCDT) and its dual. A dynamic search routing may be performed using a DS* routing algorithm to determine the shortest path on the dual graph between a start point and an end point. Based on a dynamic pushing technique, net ordering problems may be solved. A first wire can be topologically routed. Dynamic search routing of a second wire may be performed. The first wire may be pushed or detoured in response to the dynamic searching routing of a second wire.

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