Memory cell with capacitance for single event upset protection

Memory cell with nanocrystals or nanodots

Memory cell with reduced coupling between pass transistor...

Memory cell with reduced DIBL and Vss resistance

Memory cell with reduced soft error rate

Memory cell with selective deposition of refractory metals

Memory cell with self-aligned floating gate and separate...

Memory cell with self-aligned floating gate and separate...

Memory cell with self-aligned floating gate and separate...

Memory cell with stored charge on its gate and a resistance...

Memory cell with tight coupling

Memory cell with transfer device node in selective polysilicon

Memory cell with trench capacitor and vertical select...

Memory cell with trench transistor

Memory cell with trench, and method for production thereof

Memory cell with trench-isolated transistor including first...

Memory cell with vertical transistor and buried word and body li

Memory cell with vertical transistor and buried word and...

Memory cell with vertical transistor and trench capacitor

Memory cell with vertical transistor and trench capacitor...