Bi-level digit line architecture for high density DRAMS
Bias plasma deposition for selective low dielectric insulation
BICMOS semiconductor integrated circuit device and...
BICMOS semiconductor integrated circuit device and...
Bilayer aluminum last metal for interconnects and wirebond pads
Bilayer electrode on a n-type semiconductor
Bilayer metal capping layer for interconnect applications
Bilayer silicon carbide based barrier
Bit line landing pad and borderless contact on bit line stud...
Bit line landing pad and borderless contact on bit line stud...
Bit line pad and borderless contact on bit line stud with...
BLM structure for application to copper pad
Board on chip ball grid array
Board-on-chip packages
BOC BGA package for die with I-shaped bond pad layout
BOC semiconductor package including a semiconductor die and...
Bond pad array for complex IC
Bond pad design for integrated circuits
Bond pad for a flip-chip package
Bond pad for ball grid array package