Bond pad design for integrated circuits

Details Bond pad design for integrated circuits Bond pad design for integrated circuits

1998-05-04

1999-11-16

Thomas, Tom

Active solid-state devices (e.g., transistors, solid-state diode

Combined with electrical contact or lead

Of specified material other than unalloyed aluminum

257773, 257786, H01L 2348

Patent

active

059863439

ABSTRACT:
The present invention provides a bond pad support structure for use in an integrated circuit having a bond pad located thereon. In one embodiment, the bond pad support structure comprises a support layer that is located below the bond pad and that has an opening formed therein. The bond pad support structure further includes a dielectric layer that is located on the conductive layer and that extends at least partially into the opening to form a bond pad support surface over at least a portion of the opening. The first bond pad support layer, in one embodiment, may comprise a conductive metal and the second bond pad support layer may comprise of a dielectric material. The present invention provides a unique bond pad structure wherein an opening within a first bond pad support layer is at least partially filled with a second bond pad support layer. It is believed that the inter-structural cooperation between these two layers provides a graded composite support structure that acts as a differential force transducer to buffer internal and bonding stresses within an integrated circuit.

REFERENCES:
patent: 4636832 (1987-01-01), Abe et al.
patent: 4984061 (1991-01-01), Matsumoto
patent: 5502337 (1996-03-01), Nozaki
patent: 5739587 (1998-04-01), Sato
patent: 5751065 (1998-05-01), Chittipeddi et al.
K. Mukai, A. Hiraiwa, S. Muramatsu, I. Yoshida and S. Harada; "A New Integration Technology That Enables Forming Bonding Pads On Active Areas"; IEDM 1981; pp. 62-65.

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