Bond pad array for complex IC

Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead

Reexamination Certificate

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C257S784000, C257SE23152, C257SE21522, C257SE21627, C438S612000

Reexamination Certificate

active

07830005

ABSTRACT:
An integrated circuit includes: a substrate; and a bond pad array on the substrate. The bond pad array includes: a row of inner bond pads, each inner bond pad positioned with respect to a plurality of inner pad openings; a plurality of first inner metal layers respectively coupled to the inner bond pads for transmitting signals between the inner pads and an internal circuit, where at least one first inner metal layer has a width less than a width of a corresponding inner bond pad; a row of outer bond pads, staggered with respect to the row of inner bond pads; and a plurality of first outer metal layers respectively coupled to the outer bond pads for transmitting signals between the outer pads and the internal circuit, where at least one inner bond pad overlaps adjacent first outer metal layers.

REFERENCES:
patent: 6856022 (2005-02-01), Nojiri et al.
patent: 7115984 (2006-10-01), Poo et al.
patent: 7565019 (2009-07-01), Dong et al.
patent: 2005/0263885 (2005-12-01), Nakamura et al.

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