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Full-rail, dual-supply global bitline accelerator CAM circuit

Static information storage and retrieval – Associative memories – Ferroelectric cell
Reexamination Certificate

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Full-swing wordline driving circuit

Static information storage and retrieval – Floating gate – Particular biasing
Reexamination Certificate

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Fully configurable versatile field programmable function element

Static information storage and retrieval – Read/write circuit – Including specified plural element logic arrangement
Patent

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Fully hidden refresh dynamic random access memory

Static information storage and retrieval – Read/write circuit – Data refresh
Reexamination Certificate

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Fully hidden refresh dynamic random access memory

Static information storage and retrieval – Read/write circuit – Data refresh
Reexamination Certificate

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Fully integrated cache architecture

Static information storage and retrieval – Addressing – Particular decoder or driver circuit
Patent

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Fully scalable memory apparatus

Static information storage and retrieval – Addressing
Patent

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Fully static CAM cells with low write power and methods of match

Static information storage and retrieval – Associative memories – Ferroelectric cell
Patent

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Fully synchronous pipelined ram

Static information storage and retrieval – Addressing – Sync/clocking
Reexamination Certificate

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Fully synchronous pipelined ram

Static information storage and retrieval – Addressing – Sync/clocking
Patent

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Fully synchronous pipelined RAM

Static information storage and retrieval – Read/write circuit – Having particular data buffer or latch
Patent

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Fully synchronous pipelined RAM

Static information storage and retrieval – Addressing – Sync/clocking
Reexamination Certificate

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Fully synchronous pipelined ram

Static information storage and retrieval – Addressing – Sync/clocking
Patent

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Fully synchronous pipelined RAM

Static information storage and retrieval – Addressing – Sync/clocking
Patent

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Fully synchronous pipelined ram

Static information storage and retrieval – Addressing – Sync/clocking
Patent

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Fully synchronous pipelined RAM

Static information storage and retrieval – Addressing – Sync/clocking
Reexamination Certificate

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Fully used tub DRAM cell

Static information storage and retrieval – Systems using particular element – Semiconductive
Patent

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Fully-buffered memory-module with redundant memory buffer in...

Static information storage and retrieval – Read/write circuit – Testing
Reexamination Certificate

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Fully-differential amplifier

Static information storage and retrieval – Read/write circuit – Differential sensing
Patent

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Fully-hidden refresh dynamic random access memory

Static information storage and retrieval – Addressing – Sync/clocking
Reexamination Certificate

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