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Flexible OTP sector protection architecture for flash memories

Static information storage and retrieval – Read only systems
Reexamination Certificate

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Flexible RAM clock enable

Static information storage and retrieval – Addressing – Sync/clocking
Reexamination Certificate

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Flexible RAM clock enable

Static information storage and retrieval – Addressing – Sync/clocking
Reexamination Certificate

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Flexible redundancy architecture and fuse download scheme

Static information storage and retrieval – Read/write circuit – Bad bit
Patent

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Flexible redundancy for memories

Static information storage and retrieval – Read/write circuit – Bad bit
Reexamination Certificate

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Flexible SDRAM clocking (MS-DLL)

Static information storage and retrieval – Addressing – Sync/clocking
Reexamination Certificate

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Flexible time write operation

Static information storage and retrieval – Addressing – Sync/clocking
Patent

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Flexible user interface circuit in a memory device

Static information storage and retrieval – Magnetic bubbles – Guide structure
Patent

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Flexible word line boosting across VCC supply

Static information storage and retrieval – Read/write circuit – Including level shift or pull-up circuit
Reexamination Certificate

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Flip-flop circuit with controllable copying between slave and sc

Static information storage and retrieval – Systems using particular element – Flip-flop
Patent

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Flip-flop detector array for minimum geometry semiconductor memo

Static information storage and retrieval – Systems using particular element – Flip-flop
Patent

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Flip-flop with additional state storage in the event of...

Static information storage and retrieval – Read/write circuit – Differential sensing
Reexamination Certificate

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Flipflop and control circuit in a content addressable memory

Static information storage and retrieval – Associative memories – Ferroelectric cell
Patent

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Float gate memory device

Static information storage and retrieval – Floating gate – Particular connection
Reexamination Certificate

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Floating bitline test mode with digitally controllable bitline e

Static information storage and retrieval – Read/write circuit – Bad bit
Patent

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Floating bitline timer allowing a shared equalizer DRAM...

Static information storage and retrieval – Read/write circuit – Flip-flop used for sensing
Reexamination Certificate

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Floating body cell (FBC) memory device with a sense...

Static information storage and retrieval – Floating gate – Particular biasing
Reexamination Certificate

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Floating body cell memory and reading and writing circuit...

Static information storage and retrieval – Systems using particular element – Semiconductive
Reexamination Certificate

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Floating body control in SOI DRAM

Static information storage and retrieval – Read/write circuit – Data refresh
Reexamination Certificate

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Floating body memory cell system and method of manufacture

Static information storage and retrieval – Floating gate – Particular biasing
Reexamination Certificate

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