Static information storage and retrieval – Addressing – Sync/clocking
Patent
1997-06-12
1998-09-29
Nguyen, Tan T.
Static information storage and retrieval
Addressing
Sync/clocking
365194, 395556, G11C 700
Patent
active
058154639
ABSTRACT:
Methods and circuits are disclosed for a semiconductor memory that allow one or more clock cycles per memory write operation, which allow the memory clock cycle time to be varied, and which minimize power dissipation. This is achieved by providing circuits that generate a minimum internal write time reference, independent of the chosen clock cycle time, so that a memory write cycle might take one clock cycle, or more than one clock cycle if the clock cycle is shortened.
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Shiah Chun
Shih Jeng-Tzong
Ting Tah-Kang Joseph
Ackerman Stephen B.
Etron Technology, Inc
Nguyen Tan T.
Saile George O.
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