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DC to DC power converter

Static information storage and retrieval – Magnetic bubbles – Plural interacting paths
Patent

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DDR memory and storage method

Static information storage and retrieval – Addressing – Sync/clocking
Reexamination Certificate

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DDR memory modules with input buffers driving split traces...

Static information storage and retrieval – Interconnection arrangements
Reexamination Certificate

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DDR SDRAM for stable read operation

Static information storage and retrieval – Read/write circuit – Precharge
Reexamination Certificate

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DDR SDRAM for stable read operation

Static information storage and retrieval – Read/write circuit – Precharge
Reexamination Certificate

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DDR synchronous flash memory with virtual segment architecture

Static information storage and retrieval – Addressing – Plural blocks or banks
Reexamination Certificate

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DDR synchronous flash memory with virtual segment architecture

Static information storage and retrieval – Addressing – Plural blocks or banks
Reexamination Certificate

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De-skewing data signals in a memory system

Static information storage and retrieval – Read/write circuit – Signals
Patent

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Deaprom and transistor with gallium nitride or gallium...

Static information storage and retrieval – Floating gate
Reexamination Certificate

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Decimating filter

Static information storage and retrieval – Read/write circuit – With shift register
Patent

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Decode circuit for a semiconductor memory device

Static information storage and retrieval – Addressing – Particular decoder or driver circuit
Patent

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Decode circuit for use in semiconductor memory device

Static information storage and retrieval – Addressing – Particular decoder or driver circuit
Patent

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Decode path gated low active power SRAM

Static information storage and retrieval – Addressing – Particular decoder or driver circuit
Reexamination Certificate

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Decode scheme for programming antifuses arranged in banks

Static information storage and retrieval – Read/write circuit – Having fuse element
Reexamination Certificate

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Decoded autofresh mode in a DRAM

Static information storage and retrieval – Read/write circuit – Data refresh
Reexamination Certificate

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Decoded autorefresh mode in a DRAM

Static information storage and retrieval – Read/write circuit – Data refresh
Patent

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Decoded generic routing pool

Static information storage and retrieval – Floating gate – Particular connection
Reexamination Certificate

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Decoded signal comparison circuit

Static information storage and retrieval – Read/write circuit – Including signal comparison
Patent

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Decoded source lines to tighten erase Vt distribution

Static information storage and retrieval – Floating gate – Particular biasing
Reexamination Certificate

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Decoded wordline driver with positive and negative voltage modes

Static information storage and retrieval – Floating gate – Particular biasing
Patent

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