Decode circuit for use in semiconductor memory device

Static information storage and retrieval – Addressing – Particular decoder or driver circuit

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Details

36523003, 36523008, G11C 800

Patent

active

059700173

ABSTRACT:
A decode circuit for use in a semiconductor memory device can prevent an increase of an area of X-decoder and can possess a plurality of banks with operating speed maintained. A word line selection signal makes a word line of a first bank region high level, before it makes first bank selection measure "off" to separate word line selection measure from the first bank region. Next, it makes second bank selection measure "on" to use the word line selection measure for selecting the word line of the second bank region so that one word line selection measure is used in common in terms of both the first bank region and the second bank region.

REFERENCES:
patent: 5402386 (1995-03-01), Tavrow et al.
patent: 5414663 (1995-05-01), Komarek et al.
patent: 5625598 (1997-04-01), Oba
patent: 5631871 (1997-05-01), Park et al.

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