Imprint compensation circuit for use in ferroelectric semiconduc
Imprint suppression circuit scheme
Increasing the read signal in ferroelectric memories
Integrated circuit device provided with series-connected TC...
Integrated ferroelectric memory having plate lines selected...
Integrated memory having 2-transistor/2-capacitor memory cells
Integrated memory having cells of the...
Integrated memory having memory cells that each include a...
Integrated memory with plate line segments
Integrated semiconductor memory having memory cells with a...
Interleave control device using nonvolatile ferroelectric...
Iridium oxide local interconnect