Reducing sneak currents in virtual ground memory arrays
Reducing the effects of noise in non-volatile memories...
Reducing the effects of noise in non-volatile memories...
Reducing the effects of noise in non-volatile memories...
Reducing the effects of noise in non-volatile memories...
Reducing the effects of noise in non-volatile memories...
Reducing the impact of interference during programming
Reducing the impact of program disturb
Reduction of adjacent floating gate data pattern sensitivity
Reduction of adjacent floating gate data pattern sensitivity
Reduction of adjacent floating gate data pattern sensitivity
Reduction of adjacent floating gate data pattern sensitivity
Reduction of adjacent floating gate data pattern sensitivity
Reduction of leakage current and program disturbs in flash...
Reduction of oxide stress through the use of forward biased body
Reduction of programming time in electrically programmable...
Reduction of punch-through disturb during programming of a...
Reduction of voltage stress across a gate oxide and across a...
Redundancy architecture for an interleaved memory
Redundancy circuit and method for flash memory devices