SRAM device using MIS transistors

SRAM emulator

SRAM power reduction

SRAM synchronized with an optimized clock signal based on a...

SRAM with an address and data multiplexer

SRAM with simplified architecture for use with pipelined data

SRAM with transparent address latch and unlatched chip enable

SRAM-address-change-detection circuit

Stackable microelectronic components with self-addressing...

Stackable microelectronic components with self-addressing...

Stacked semiconductor memory device

Staggered pipeline access scheme for synchronous random access m

Staggered pipeline access scheme for synchronous random access m

Staggered row line firing in single ras cycle

State maintenance pulsing for a memory device

State maintenance pulsing for a memory device

Static memory containing sense AMP and sense AMP switching circu

Static memory device provided with a signal generating circuit f

Static memory having pipeline registers

Static memory utilizing transition detectors to reduce power con