One stage word line decoder/driver with speed-up Darlington driv
Output line arrangement structure of row decoding array
Output signal driver
Over driver control signal generator in semiconductor memory...
Over driving control signal generator in semiconductor...
Over driving control signal generator in semiconductor...
Over driving control signal generator in semiconductor...
Partially reconfigurable memory cell arrays
Partitioned decode circuit for low power operation
Pass gate decoder for a multiport memory dEvice that uses a sing
Pass gate with low transistor junction breakdown susceptibility
Path gate driver circuit
Phase change random access memory (PRAM) device
Power saving architecture for a cache memory
Power-gating system and method for integrated circuit devices
Precharge-enable self boosting word line driver for an embedded
Predecode column architecture and method
Predecode column architecture and method
Predecode column architecture and method
Predecoder control circuit