Pass gate decoder for a multiport memory dEvice that uses a sing

Details Pass gate decoder for a multiport memory dEvice that uses a sing Pass gate decoder for a multiport memory dEvice that uses a sing

1997-08-29

1998-12-08

Nelms, David C.

Static information storage and retrieval

Addressing

Particular decoder or driver circuit

36523005, G11C 700

Patent

active

058480196

ABSTRACT:
Described is a last stage decoder that generates a local word line signal within a bank of a single-ported memory cell array structure. The decoder inputs predecoded global row address signals, as well as predecoded local row address signals. In order to generate the local word line signal, and thus access a memory cell within a given bank, both one predecoded global row address signal, as well as one predecoded local row address signal must be present. The predecoded local row address signal turns on a pass gate transistor, and allows the predecoded global row address signal to pass through the pass gate transistor and create the local word line signal.

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