H-matrix for error correcting circuitry

Details H-matrix for error correcting circuitry H-matrix for error correcting circuitry

2008-05-06

2008-05-06

Lamarre, Guy J. (Department: 2112)

Error detection/correction and fault detection/recovery

Pulse or data error handling

Digital data error correction

C714S777000

Reexamination Certificate

active

07370264

ABSTRACT:
A matrix H for encoding data words is defined for wide word ECC with uniform density and a reduced number of components. The H-matrix is incorporated in an encode unit operable to Hamming encode a data word with a 10×528 matrix generated in groups of four columns wherein; a first column is a complement of a second column; the value of the second column ranges from 9 to 271 in increments of two; a third column is a complement of a fourth column; and the value of the fourth column is the same as the value of the second column less one; and wherein a 528-bit bottom row is added to the 10×528 matrix comprising alternating zeroes and ones starting with a zero creating an 11×528 matrix.

REFERENCES:
patent: 4569052 (1986-02-01), Cohn et al.
patent: 7058876 (2006-06-01), Ireland et al.
patent: 2003/0187899 (2003-10-01), Ohta

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