Electronic digital logic circuitry – Signal sensitivity or transmission integrity – Bus or line termination
Reexamination Certificate
2006-09-19
2008-10-14
Cho, James H (Department: 2819)
Electronic digital logic circuitry
Signal sensitivity or transmission integrity
Bus or line termination
C326S093000
Reexamination Certificate
active
07436202
ABSTRACT:
The present invention provides a method and apparatus is provided for calibrating a driver impedance in an integrated circuit device. The method includes providing a signal from a synchronous circuit that is indicative of an impedance mismatch between a driver circuit and a load. The method also includes selecting one of a plurality of impedances of the driver circuit to reduce the impedance mismatch in response to the signal.
REFERENCES:
patent: 6087847 (2000-07-01), Mooney et al.
Johnson Brian
Lin Feng
Cho James H
Dorsey & Whitney LLP
Micro)n Technology, Inc.
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