Digital logic unit reconfigurable in nonvolatile fashion
Digital logic unit reconfigurable in nonvolatile fashion
Digital radio frequency switch matrix
Disabling unused/inactive resources in programmable logic...
Distributed bus structure
Distributed memory and logic circuits
Distributed memory in field-programmable gate array...
Distributed RAM in a logic array
Distributed random access memory in a programmable logic device
Distributed random access memory in a programmable logic device
Distribution of signals throughout a spine of an integrated...
Double data rate flip-flop
Double data rate flip-flop
Double data rate input and output in a programmable logic...
Download sequencing techniques for circuit configuration data
Download sequencing techniques for circuit configuration data
DPRIO for embedded hard IP
DRAM memory cell for programmable logic devices
Driver circuitry for programmable logic devices
Driver circuitry for programmable logic devices