Page boundary detector
Parallel configuration method and/or architecture for PLDs...
Parallel configuration of programmable devices
Parallel configuration of programmable devices
Parallel configuration of programmable devices
Parallel interface for configuring programmable devices
Parallel interface for configuring programmable devices
Parallel programming of in-system (ISP) programmable devices usi
Partially reconfigurable FPGA and method of operating same
Physically-enforced time-limited cores and method of operation
Pin multiplexing
Pin programmable reference
Power saving method in an integrated circuit programming and...
Power switch circuit sizing technique
Power-managed sense amplifier for programmable logic device
Power-on reset circuit and IC card
Power-up logic reference circuit and related method
Pre-programmed integrated circuit including programmable logic
Preset and reset circuitry for programmable logic device...
Preset and reset circuitry for programmable logic device...