Parallel programming of in-system (ISP) programmable devices usi

Details Parallel programming of in-system (ISP) programmable devices usi Parallel programming of in-system (ISP) programmable devices usi

1996-04-16

1998-05-12

Hudspeth, David R.

Electronic digital logic circuitry

Multifunctional or programmable

Having details of setting or programming of interconnections...

326 41, 3241581, H03K 19177

Patent

active

057511632

ABSTRACT:
An automatic tester is provided to simultaneously program PLDs organized in device chains, so as to minimize programming time and to maximize utilization of the tester pins. Various configurations which allow parallel programming of device chains are provided for device chains using the same programming convention, e.g. in-system programming (ISP) convention. Various configuration which allow parallel programming of device chains using different programming conventions, such as BSCAN and ISP conventions, are provided.

REFERENCES:
patent: 5237219 (1993-08-01), Cliff
patent: 5457408 (1995-10-01), Leung
patent: 5493239 (1996-02-01), Zlotnick
patent: 5528600 (1996-06-01), El Ayat et al.
patent: 5543730 (1996-08-01), Cliff et al.
"Lattice In-System Programmability Manual 1994", Lattice Semiconductor Corporation.

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