Electronic digital logic circuitry – Multifunctional or programmable – Having details of setting or programming of interconnections...
Reexamination Certificate
1999-08-27
2001-04-17
Tokar, Michael (Department: 2819)
Electronic digital logic circuitry
Multifunctional or programmable
Having details of setting or programming of interconnections...
C326S101000
Reexamination Certificate
active
06218855
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to routing connections between functional units and a side-exiting bus. More particularly, the present invention provides a method for efficiently routing conductive paths between functional units and side-exiting buses.
2. The Background Art
Integrated circuits have within them functional circuitry which operates on signal information in order to produce a desired result. Signals are typically multiple bits wide, and it is typical to provide groups of functional circuits which process that information.
FIG. 1
shows the arrangement of functional units in an example prior art integrated circuit.
Referring to
FIG. 1
, group
10
includes functional units
12
,
14
,
16
,
18
, and
20
, each having circuitry for processing bits of information in a signal. Group
22
also includes functional units
24
,
26
,
28
,
30
, and
32
, each having circuitry for processing bits of information in a signal. Often there are several functional groups connected together in succession such as depicted herein where block
12
is connected to block
24
through conductive path
34
. However, the present invention is directed to situations in which functional units interface with external circuitry such as through a side-exiting bus such as bus
36
.
In the prior art routing example which follows, conductive paths are routed between various functional units and pins in bus
36
. For example, functional units
12
through
20
inclusive have pins
38
through
46
inclusive which are required to be connected to pins
48
through
56
inclusive of bus
36
. Note, however, that pin
46
is required to be connected to pin
48
in a “rotate right” configuration. Correspondingly, functional units
24
through
32
inclusive have pins
58
through
66
inclusive which are required to be connected to pins
68
through
76
inclusive of bus
36
.
Prior to routing, functional unit
24
, for example, includes pin
58
which is not yet connected to pin
68
of bus
36
. In the prior art, when a side exiting bus is routed to a location containing functional units, conductive paths are routed from the side pins to locations which are approximately centered in the width of each functional unit. Thus, if a side-exiting bus were left-justified with respect to the set of functional units to which it will eventually connect (as shown in FIG.
1
), the topmost pin on the bus is routed to a position such as position
78
in FIG.
1
. The second and succeeding pins in the bus are routed to intermediate positions such as positions
80
,
82
,
84
, and
86
. The pins from the various functional units are then routed to the proper ones of positions
78
,
80
,
82
, etc. which connect to the desired pin in the side-exiting bus
36
.
While useful for its intended purpose of providing connectivity between functional units and side-exiting bus pins, the prior art method fails to minimize the complexity of the routing between intermediate positions and each functional unit. For example, the conductive path
88
between pin
58
and position
68
requires that two vertical lines and one horizontal line be routed. It would be beneficial to provide a routing method which minimizes the complexity of the conductive paths and in turn minimizes the horizontal and vertical resources used by a given conductive path.
A second example of an inefficient routing is provided in
FIG. 1
where functional unit
20
has a pin
46
which is required to be connected to pin
48
of bus
36
. This inefficient example is comparable of a “rotate right” operation, where the rightmost bit in a series of bits is removed from that position and added to the leftmost position in the series. Thus, a signal value of 01101 would become 10110 after the “rotate right” command. The prior art methods, when routing the connection between pin
46
and pin
48
, consume many more vertical and horizontal resources than desired, while unnecessarily complicating the routing. Three vertical resources are used, and two horizontal resources are used to complete the routing.
A third example of an inefficient routing performed by prior art methods is provided in
FIG. 2
where side-exiting bus
90
has pins
92
,
94
,
96
, and
98
which are required to be connected to
100
,
102
,
104
,
106
, and
108
respectively. Using the prior art method, a connection to pin
92
will be routed to position
110
. A conductor from position
110
would then be routed to pin
100
of functional unit
112
. Routing the connectivity between pins
92
and
100
in this manner causes the vertical segment connecting the two pins to unnecessarily be broken into two pieces
114
and
116
. Further, horizontal segment
118
is routed using a different horizontal pathway than used by segment
120
.
It would be beneficial to provide a method for routing conductive paths which has increased efficiency over prior art methods.
SUMMARY OF THE INVENTION
A method for routing a conductive path in an integrated circuit is described. The method includes providing a side exiting bus comprising at least one pin, and providing a plurality of functional units, at least one functional unit having a pin required to be electrically connected to a pin in the side-exiting bus. The method further includes routing a first conductive path from one of the at least one pins in the side exiting bus to a point external to the functional units, the resulting conductive path spanning the width of the plurality of functional units, and routing a second conductive path in a straight line from the at least one pin in the at least one functional unit to a point on the first conductive path.
REFERENCES:
patent: 4926066 (1990-05-01), Maini et al.
patent: 5296748 (1994-03-01), Wicklund et al.
patent: 5471157 (1995-11-01), McClure
patent: 5471409 (1995-11-01), Tani
patent: 5629859 (1997-05-01), Agarwala et al.
patent: 5825661 (1998-10-01), Drumm
patent: 5861764 (1999-01-01), Singer et al.
patent: 5867396 (1999-02-01), Parlour
patent: 5903577 (1999-05-01), Teene
Ghosh Pradiptya
Walsh Robert J.
Le Don Phu
Sierra Patent Group Ltd
Sun Microsystems Inc.
Tokar Michael
LandOfFree
Datapath global routing using flexible pins for side exiting... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Datapath global routing using flexible pins for side exiting..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Datapath global routing using flexible pins for side exiting... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2551716