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Technique for improving propagation delay of low voltage to...

Electronic digital logic circuitry – Interface – Logic level shifting
Reexamination Certificate

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Technique for voltage level shifting in input circuitry

Electronic digital logic circuitry – Interface – Logic level shifting
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Threshold voltage scalable buffer with reference level

Electronic digital logic circuitry – Interface – Logic level shifting
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Threshold voltage scalable buffer with reference level

Electronic digital logic circuitry – Interface – Logic level shifting
Patent

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Threshold voltage scalable buffer with reference level

Electronic digital logic circuitry – Interface – Logic level shifting
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Transmitter/receiver circuit and method therefor

Electronic digital logic circuitry – Interface – Logic level shifting
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TTL input buffer with on-chip reference bias regulator and decou

Electronic digital logic circuitry – Interface – Logic level shifting
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TTL to CMOS level translator with voltage and threshold compensa

Electronic digital logic circuitry – Interface – Logic level shifting
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TTL-CMOS output stage for an integrated circuit

Electronic digital logic circuitry – Interface – Logic level shifting
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TTL/CMOS compatible input buffer with Schmitt trigger

Electronic digital logic circuitry – Interface – Logic level shifting
Patent

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Tuning high-side and low-side CMOS data-paths in CML-to-CMOS...

Electronic digital logic circuitry – Interface – Logic level shifting
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Two-ended voltage level shifter for TFT LCD gate driver

Electronic digital logic circuitry – Interface – Logic level shifting
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Two-stage level shifting module

Electronic digital logic circuitry – Interface – Logic level shifting
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