Electronic digital logic circuitry – Interface – Logic level shifting
Patent
1990-11-08
1994-12-20
Zazworsky, John
Electronic digital logic circuitry
Interface
Logic level shifting
327206, H03K 19094, H03K 190175, H03K 3356
Patent
active
RE0348082
ABSTRACT:
A TTL/CMOS compatible input buffer circuit comprises a Schmitt trigger input buffer stage and a reference voltage generator. In the TTL mode, the reference voltage generator supplies a reference voltage having a level that forces the trigger point of the Schmitt trigger to a predetermined value. In the CMOS mode, the reference voltage generator is disabled and a voltage equal to the power supply voltage is provided to the Schmitt trigger. The input buffer circuit affords an enhanced input noise margin and minimizes DC power loss.
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Leeds Keeneth E.
Xilinx , Inc.
Young Edel M.
Zazworsky John
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