Integrated circuit having outputs configured for reduced state c

Interleaved and sequential counter

Interpolating function generator for transmitter square root ext

Jitter-free divider

Johnson counter circuit with invalid counter position detection

Linear all-digital phase locked loop

Loadable divide-by-N with fixed duty cycle

Logic circuit

Logic circuit

Logic circuit having a test data loading function

Look ahead terminal counter

Low jitter fractional divider with low circuit speed constraint

Low power clock generator circuit

Low power programmable ripple counter

Low power scannable counter

Low voltage dual-modulus prescaler circuit using merged pseudo-d

LSI Timing circuit for a digital display employing a modulo eigh

Maskable cascade counter

Matrix of multiplexed synchronized counters for an integrated ci

Maximum length linearly occurring code sequence generator