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Duty cycle distortion compensation for the data output of a...

Electrical computers and digital processing systems: support – Synchronization of clock or timing signals – data – or pulses – Using delay
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Duty cycle rejecting serializing multiplexer for output data...

Electrical computers and digital processing systems: support – Synchronization of clock or timing signals – data – or pulses
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Dynamic programmable delay selection circuit and method

Electrical computers and digital processing systems: support – Synchronization of clock or timing signals – data – or pulses – Using delay
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Dynamic programmable delay selection circuit and method

Electrical computers and digital processing systems: support – Synchronization of clock or timing signals – data – or pulses – Using delay
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Dynamic resynchronization of clocked interfaces

Electrical computers and digital processing systems: support – Synchronization of clock or timing signals – data – or pulses – Using delay
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Dynamic wave-pipelined interface apparatus and methods therefor

Electrical computers and digital processing systems: support – Synchronization of clock or timing signals – data – or pulses – Using delay
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