Tracking bin split technique
UART clock wake-up sequence
Universal synchronization clock signal derived using single...
Universal synchronization clock signal derived using single...
Universal timeout mechanism
Upgradeable microprocessor and motherboard
Use of a UUID as a time epoch to determine if the system...
Use of T4 timestamps to calculate clock offset and skew
Variable clock configuration for switched op-amp circuits
Variable frequency clock for an electronic system and method the
Variable frequency clock output circuit and apparatus, motor...
Variable speed controller
Virtual machine monitor, virtual machine system and clock...
Virtual real time clock maintenance in a logically...
Virtual system time management system utilizing a time...
Wander generator having arbitrary TDEV mask characteristic...
Wide frequency range PLL clock generating circuit with delta...
Wide instruction word graphics processor
Zero clock skew computer module