Electrical computers and digital processing systems: support – Clock – pulse – or timing signal generation or analysis
Reexamination Certificate
2007-04-10
2007-04-10
Perveen, Rehana (Department: 2116)
Electrical computers and digital processing systems: support
Clock, pulse, or timing signal generation or analysis
C713S501000
Reexamination Certificate
active
09932891
ABSTRACT:
A clock configuration for driving switched op-amp circuits operated in opposite phases is presented in which a common off-phase of variable length is inserted between the on-phases of the individual operational amplifiers. The length of the off-phase can be adapted to the transient response of the operational amplifiers used. The clock configuration according to the invention can be used for further reducing the power consumption of switched op-amp circuits.
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Sauerbrey Jens
Thewes Roland
Wittig Martin
Chen Tse
Greenberg Laurence A
Infineon - Technologies AG
Locher Ralph E.
Perveen Rehana
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