Electrical computers and digital processing systems: support – Clock – pulse – or timing signal generation or analysis – Counting – scheduling – or event timing
Reexamination Certificate
2005-09-27
2008-08-26
Suryawanshi, Suresh K (Department: 2115)
Electrical computers and digital processing systems: support
Clock, pulse, or timing signal generation or analysis
Counting, scheduling, or event timing
C713S400000, C719S318000
Reexamination Certificate
active
07418615
ABSTRACT:
According to one embodiment, a system is disclosed. The system includes a central timeout manager (CTM) to receive timeout events from two or more clients and a search unit to search for a location in a list of timeout events to place a new received timeout event.
REFERENCES:
patent: 7000150 (2006-02-01), Zunino et al.
patent: 7047533 (2006-05-01), Circenis
patent: 2003/0051062 (2003-03-01), Circenis
patent: 2005/0268136 (2005-12-01), Kostadinov et al.
Chang Nai-Chih
Lau Victor
Seto Pak-Iung
Fleming Caroline M.
Gagne Christopher K.
Intel Corporation
Suryawanshi Suresh K
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