Link stack repair of erroneous speculative update
Local and global branch prediction information storage
Loop control circuit and loop control method
Loop instruction processing using loop buffer in a data...
Loop iteration prediction by supplying pseudo branch...
Loop processing counter with automatic start time set or...
Low-latency DMA handling in pipelined processors
Low-latency interrupt handling during memory access delay...
Macroscalar processor architecture
Macroscalar processor architecture
Map unit having rapid misprediction recovery
Mechanism for delivering precise exceptions in an...
Mechanism for error handling in a computer system
Mechanism for executing computer instructions in parallel
Mechanism for handling failing load check instructions
Mechanism for hardware tracking of return address after tail...
Mechanism to determine actual code execution flow in a computer
Method and apparatus for a stew-based loop predictor
Method and apparatus for accelerated instruction restart in a mi
Method and apparatus for affecting subsequent instruction proces