Loop iteration prediction by supplying pseudo branch...

Electrical computers and digital processing systems: processing – Processing control – Branching

Reexamination Certificate

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Details

C712S239000, C712S240000

Reexamination Certificate

active

07886134

ABSTRACT:
This invention combines a loop support mechanism and a branch prediction mechanism. After an instruction execution unit executes an end block instruction of a block repeat, the loop control unit branches to the first instruction in the loop and sends a pseudo branch instruction to the instruction execution unit. The instruction execution unit acts as if the last instruction in the block is an instruction for branching to the start address of the block. This is stored in the branch prediction unit and branch prediction is performed thereafter.

REFERENCES:
patent: 6282633 (2001-08-01), Killian et al.
patent: 7272704 (2007-09-01), Nguyen et al.
patent: 2005/0102659 (2005-05-01), Singh et al.
patent: 2001-109627 (2001-04-01), None

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