Distributed processing in a multiple processing unit...

DSP data type matching for operation using multiple...

DSP operations with permutation of vector complex data type...

Dyadic DSP instruction processor with main and sub-operation...

Dyadic DSP instructions for digital signal processors

Dyadic instruction processing instruction set architecture...

Dyadic operations instruction processor with configurable...

Dynamic runtime range checking of different types on a...

Electronic parallel processing circuit for performing jump...

Executing partial-width packed data instructions

Execution of data dependent arithmetic instructions in...

Execution unit and method for executing performance critical and

Explicit rate computational engine

Fixed length memory to memory arithmetic and architecture...

Floating point and multimedia unit with data type reclassificati

Floating point NaN comparison

Floating point only SIMD instruction set architecture...

Floating point operation system which determines an exchange ins

Floating point stack manipulation using a register map and specu

Floating point unit with variable speed execution pipeline...