Execution unit and method for executing performance critical and

Details Execution unit and method for executing performance critical and Execution unit and method for executing performance critical and

1997-06-30

1999-09-07

De Cady, Albert

Electrical computers and digital processing systems: processing

Processing control

Arithmetic operation instruction processing

712 1, 712223, 712226, 712 32, G06F 900

Patent

active

059480980

ABSTRACT:
A CPU (central processing unit) of a computer that comprises an issue unit and an execution unit. The issue unit selectively issues arithmetic instructions of a predefined arithmetic instruction type as performance critical arithmetic instructions and non-performance critical arithmetic instructions. The execution unit comprises a performance critical pipeline to execute the performance critical arithmetic instructions. The execution unit also comprises a non-performance critical pipeline to execute the non-performance critical arithmetic instructions.

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Supnik, Digital's Alpha AXP Architecture, Communications of the ACM, vol. 36, No. 2, p. 34, Feb. 1993.

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