RISC processor with a debug interface unit

RISC type microprocessor and information processing apparatus

RISC86 instruction set

Rotation register for orthogonal data transformation

Routing protocol based redundancy design for shared-access...

Row and column enable signal activation of processing array...

Run-time code compiler for data block transfer

Run-time node prefetch prediction in dataflow graphs

Run-time node prefetch prediction in dataflow graphs

Safety net paradigm for managing two computer execution modes

Scalable and configurable multimedia system for a vehicle

Scalable hypercube multiprocessor network for massive...

Scaleable array of micro-engines for waveform processing

Scannable zero-catcher and one-catcher circuits for reduced...

Scheduler which retries load/store hit situations

Secondary processor execution kernel framework

Segment register renaming in an out of order processor

Selective bypassing of a multi-port register file

Selectively prohibiting speculative execution of conditional...

Semiconductor multi-chip module