Electrical computers and digital processing systems: processing – Processing architecture – Microprocessor or multichip or multimodule processor having...
Reexamination Certificate
2005-07-01
2010-02-16
Chan, Eddie P (Department: 2183)
Electrical computers and digital processing systems: processing
Processing architecture
Microprocessor or multichip or multimodule processor having...
C712S001000, C712S032000, C712S043000
Reexamination Certificate
active
07664931
ABSTRACT:
A scalable and fully configurable computing architecture for a mobile multimedia architecture used in a vehicle includes a head unit having a processor, a field programmable gate array and a memory. The processor and the memory are configured to communicate over a first bus that is a dedicated memory bus, and the processor and the field programmable gate array are configured to communicate over a separate second bus. The field programmable gate array is configured to be loaded from memory with part of a multimedia vehicle-related application-specific functionality that is executable by the field programmable gate array, and the processor is cooperatively operable with the field programmable gate array to execute another portion of the multimedia vehicle-related application-specific functionality. The multimedia vehicle-related application-specific functionality in the field programmable gate array may be changed with software and downloaded to the field programmable gate array in the field. In addition, due to the first and second busses being recognized industry standard busses, any of the processor, the field programmable gate array and the memory are fully scaleable and configurable.
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Erforth Thomas
Rupprecht Matthias
Brinks Hofer Gilson & Lione
Chan Eddie P
Harman / Becker Automotive Systems GmbH
Partridge William B
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