Processor coupled by visible register set to modular...
Processor executing plural instruction sets (ISA's)...
Processor for improving instruction utilization using...
Processor having bug avoidance function and method for avoiding
Processor pipeline architecture logic state retention...
Processor synchronization in a multi-processor computer system
Processor system with an improved instruction decode control...
Processor system with an improved instruction decode control...
Processor with coprocessor interfacing functional unit for...
Processor with multiple execution units and local and global reg
Processor with programmable addressing modes
Processor-controller interface for non-lock step operation
Programmable ALU
Programmable controller with a BPU that executes first-class ins
Programmable distributed appliance control system
Programmable logic datapath that may be used in a field programm
Programmable processing unit with an input buffer and output...
Programmable processor with group floating point operations
Programmable RISC-DSP architecture
Programmable vendor identification circuitry and associated...