Processor having bug avoidance function and method for avoiding

Electrical computers and digital processing systems: processing – Processing architecture – Microprocessor or multichip or multimodule processor having...

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712 28, 714 2, 714 10, 714799, 714811, G06F 928

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active

060264802

ABSTRACT:
A reconfigurable circuit wherein part or all of an instruction or a result of decoding thereof and output of said register file are inputted and a circuit structure thereof can be changed by an external signal is provided. If a bug occurs when part or all of the instruction or the result of decoding thereof and the output of the register file satisfy a particular condition, the reconfigurable circuit is reconstructed by an external signal so as to output a first signal under that particular condition. An interrupt control circuit controls a processing unit so as to carry out processing based on the first signal or processing to avoid the bug when the first signal is inputted.

REFERENCES:
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patent: 4901320 (1990-02-01), Sawada et al.
patent: 5748979 (1998-05-01), Trimberger
patent: 5784636 (1998-07-01), Rupp
patent: 5852742 (1998-12-01), Vondran, Jr. et al.
Michael Butts, Future Directions of Dynamically Reprogrammable Systems, IEEE Custom Integrated Circuits Conference 1995, p. 487-494, May 1995.

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