Apparatus and method for two micro-operation flow using...

Details Apparatus and method for two micro-operation flow using... Apparatus and method for two micro-operation flow using...

2003-07-30

2008-11-11

Coleman, Eric (Department: 2183)

Electrical computers and digital processing systems: processing

Dynamic instruction dependency checking, monitoring or...

C712S022000

Reexamination Certificate

active

07451294

ABSTRACT:
A method and apparatus for a two micro-operation flow using source override. In one embodiment, the method includes the identification of a macro-instruction having one or more streaming single instruction multiple data extension type operands. Once received, the macro-instruction is decoded into a first micro-operation (uOP) and a second uOP. Once decoded, a signal is asserted to disable source operand override logic if the first micro-operation updates a logical destination register that matches a logical source register of the micro-operation. Otherwise, the mutual source override is active and executed by a register alias table (RAT) when uOP with matching logic source and destination register are detected in a same clock cycle. In doing so, macro-instructions having 128-bit operands may be processed using, for example, two uOPs (one for the lower half and one for the upper half) in a 64-bit implementation, while preserving the atomicity of the original instruction.

REFERENCES:
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patent: 6745319 (2004-06-01), Balmer et al.
patent: 6820190 (2004-11-01), Knebel et al.
patent: 6877084 (2005-04-01), Christie

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