Electrical computers and digital processing systems: processing – Dynamic instruction dependency checking – monitoring or... – Commitment control or register bypass
Reexamination Certificate
2008-04-29
2008-04-29
Ellis, Richard L. (Department: 2183)
Electrical computers and digital processing systems: processing
Dynamic instruction dependency checking, monitoring or...
Commitment control or register bypass
Reexamination Certificate
active
10951836
ABSTRACT:
A method and apparatus are provided for entering and exiting multiple threads within a multithreaded processor. A state machine is maintained to indicate a respective status of an associated thread of multiple threads being executed within a multithreaded processor. A change of status for a first thread within the multithreaded processor is detected and, responsive to the change of status for the first thread within the multithreaded processor, a partitioning scheme for the functional unit is altered to service a second thread, but not the first thread, within the multithreaded processor when the change of the status of the first thread comprises a transition from an active state to an inactive state.
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Boggs Darrell
Hsu Rachel
Kota Rajesh
Merchant Amit
Rodgers Dion
Blakely , Sokoloff, Taylor & Zafman LLP
Ellis Richard L.
Intel Corporation
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