Electrical computers and digital processing systems: processing – Dynamic instruction dependency checking – monitoring or...
Patent
1998-03-26
2000-01-11
Treat, William M.
Electrical computers and digital processing systems: processing
Dynamic instruction dependency checking, monitoring or...
712218, 712222, 712226, G06F 938
Patent
active
060147369
ABSTRACT:
A microprocessor is provided for executing a floating point exchange micro instruction sequence to swap the contents a first location and a second location. The microprocessor includes register/control logic that receives a floating point micro instruction, determines that the contents of the first location depend upon resolution of a preceding floating point micro instruction, and provides a signal indicating the dependency. The microprocessor also has interlock logic that, in the event of a dependency forwards a new target location to the preceding floating point micro instruction. The microprocessor also includes target location modification logic that receives the new target location and for provides the new target location to the preceding floating point micro instruction. Modification of the target location allows the floating point exchange micro instruction sequence to execute without resolution delay.
REFERENCES:
patent: 5367650 (1994-11-01), Sharangpani et al.
patent: 5499352 (1996-03-01), Clift et al.
patent: 5634118 (1997-05-01), Blomgren
patent: 5913047 (1999-06-01), Mahalingalah et al.
Elliott Timothy A.
Henry G. Glenn
Loper, Jr. Albert J.
Huffman James W.
Huffman Richard K.
IP - First LLC
Treat William M.
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