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Multiple-core processor with flexible cache directory scheme

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Multiple-core processor with support for multiple virtual...

Electrical computers and digital processing systems: memory – Addressing combined with specific memory configuration or... – For multiple memory modules
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Multiple-grant controller with parallel arbitration...

Electrical computers and digital processing systems: memory – Storage accessing and control – Shared memory area
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Multiple-level persisted template caching

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Multiple-level persisted template caching

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Multiple-location read, single-location write operations...

Electrical computers and digital processing systems: memory – Storage accessing and control – Shared memory area
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Multiple-mode external cache subsystem

Electrical computers and digital processing systems: memory – Storage accessing and control – Access timing
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Multiple-RAM CAM device and method therefor

Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
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Multiple-reader multiple-writer queue for a computer system

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Multiple-stage pipeline for transaction conversion

Electrical computers and digital processing systems: memory – Storage accessing and control – Access timing
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Multiplexed computer system

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Multiplexed computer system with the capability to copy data fro

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Multiplexed data transfer arrangement including a...

Electrical computers and digital processing systems: memory – Storage accessing and control – Access timing
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Multiplexed random access memory with time division multiplexing

Electrical computers and digital processing systems: memory – Storage accessing and control – Access timing
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Multiplexed semiconductor data transfer arrangement with...

Electrical computers and digital processing systems: memory – Storage accessing and control – Access timing
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Multiplexing DRAM control signals and chip select on a processor

Electrical computers and digital processing systems: memory – Address formation – Address mapping
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Multiplexing of trim outputs on a trim bus to reduce die size

Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
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Multiplexing-interleaving and demultiplexing-deinterleaving

Electrical computers and digital processing systems: memory – Storage accessing and control – Control technique
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Multiport content addressable memory device and timing signals

Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
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Multiport FIFO with programmable width and depth

Electrical computers and digital processing systems: memory – Storage accessing and control – Memory configuring
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